Browse Prior Art Database

Current Reflector in Cascode Emitter Coupled Logic

IP.com Disclosure Number: IPCOM000062395D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Wong, RC [+details]

Abstract

This article describes a means for improving the performance of a cascode current switch through a circuit scheme which extends the levels of cascoding without requiring an increase in power supply voltage. By its use, the original power supply may be retained together with the power efficiency of the cascode design, without unwanted increases in path length, i.e., path delay. Cascoding, while very useful in the implementation of fast arithmetic units, is limited in the number of cascode levels by the power supply and circuit complexities introduced. By way of illustration, a majority logic tree in five-level CECL (cascode emitter coupled logic) is shown in Fig. 1 (note: up-clamps and level shifting devices are omitted for simplification).