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Grounding Contact for a CMOS Device Disclosure Number: IPCOM000062407D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09

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El-Kareh, B Gravenites, GG [+details]


A process is presented for forming a grounding contact for a source region of a complementary metal-oxide-silicon (CMOS) device. Fig. 1 shows a cross-sectional view of an n-channel CMOS device A and a p-channel CMOS device B. In some CMOS applications, it may be desirable to form a grounding contact to the source region 10a of the n-channel CMOS device A. A process is disclosed for forming a "strap" grounding contact using conventional siliciding techniques. Fig. 2 shows a photoresist mask 11 which exposes a portion of the source region 10a as well as an abutting portion of a semi-recessed oxide (SROX) region. The exposed portion of the SROX is etched to expose a substantial portion of the boron field implant region 1F.