System for Converting Static Test Data Into Clocked Functional Data
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Current test simulators and static testers used on non-LSSD (level sensing scan design) semiconductor chip designs do not provide for functional speed testing of a product which cycles faster than the tester cycle. By converting certain ordered bit configurations found in sequential static test bit patterns into clocked functional data, it becomes possible to do functional speed testing, data reduction, and minimize the number of tester buffer break problems. The logic for detecting and converting sequential static test data patterns which repeat, except for one column or group of columns, into test patterns with embedded pulse control characters can be implemented in hardware or software. An example of the conversion technique is shown in Fig.