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Minimized Reversible Lssd Counter

IP.com Disclosure Number: IPCOM000062451D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Dimitri, KE [+details]

Abstract

Deskewing data bits for multiple track media applications requires a reversible (up/down) counter for data bit alignment. The design for this type of reversible counter application does not need to count in a binary synchronous fashion, as conventional counters do. The subject designs are based on Gray code counting per two binary bits, or pair of latches, in a reversible counting of binary bits. In this implementation a four-bit reversible counter is chosen. The two-bit reversible Gray code counter will be shown first, with the boolean logical expression, truth table and implementation. Then the cascade of two of the two-bit reversible counter will be shown to form a four-bit reversible counter. Figs. 1a and 1b depict the truth table for up and down counting.