Browse Prior Art Database

ITERATION Synchronization Architecture

IP.com Disclosure Number: IPCOM000062514D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Brady, JT [+details]

Abstract

In machine architectures capable of supporting multiple simultaneous execution of successive iterations of a loop, there is a requirement that an iteration can communicate with the prior iteration and subsequent iterations relative to the state of shared resources. The efficiency of this communication has a substantial impact on the number of applications that can run on such machines. Each instruction in a machine instruction set contains a field to specify the synchronization requirement and to set or test the state of synchronization. ITERATION SYNCHRONIZATION: CMD = 1XX SYNCH CMD CMD = X1X HOLD CMD = XX1 RELEASE CMD = 1XX indicates that the loop contains dependencies on previous iterations. This is coded in the first instruction of the loop. The dependency is on the common registers and index registers.