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Hardware-Assisted Test and Set Function

IP.com Disclosure Number: IPCOM000062522D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Miller, EW Nash, TA Sussenguth, EH [+details]

Abstract

This article describes a hardware-assisted Test and Set function which can improve the performance of multiprogramming or multiprocessor systems. The instruction sets for some microprocessors include a "test and Set (TAS) instruction which is used to coordinate control between two or more processors or between two or more programs being executed in a multiprogramming environment. This instruction reads a memory location determined by the effective address specified, tests the contents of that memory location, sets condition codes based upon the results of the test, and then writes back into the original memory specified. Two tests are applied to the contents of the specified memory location. One determines if the data's value is equal to zero.