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Alternate Bus Master Tie Breaker Circuit

IP.com Disclosure Number: IPCOM000062531D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Buckton, WL Schwartz, AJ [+details]

Abstract

When a microprocessor is used as an alternate bus master for a microcomputer, a hang condition may exist if the microcomputer attempts to access the alternate bus master microprocessor at the same time that the alternate bus master microprocessor is attempting to access the microcomputer storage. The circuit shown in the figure causes the microprocessor to enter a retry operation during the contention condition thus allowing the microcomputer to complete its cycle without the need for software interlocks. Description of Contention Tie Breaker 1. The microprocessor 12 attempts to access the microcomputer system bus. The microprocessor 12 places its address on the bidirectional address bus 14 and address decoder 16 (#1) activates a bus request on line 18 to the host (not shown). 2.