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Shallow Junctions by Dual Implantation and Annealing

IP.com Disclosure Number: IPCOM000062638D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Harrison, HB Sai-Halasz, GA [+details]

Abstract

This article relates generally to integrated circuit construction and, more particularly, to the formation of source/drain junctions. Desired but opposing properties of shallow source/drain junctions with high conductivity and low resistivity are achievable through steps of dual implantation and annealing. After normal processing of a semiconductor to the point of source/drain construction, a first set of implantation and annealing steps is undertaken. Implantation dosage is adjusted to avoid, as much as possible, concentration-enhanced diffusion. Conventional dopants, such as arsenic or boron, can be used for the first step, or antimony or gallium may also be used. Specific dosage and energy depend on the species involved. High temperature annealing (900-950ŒC) then takes place.