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Method for Very Flat Wafer Polishing Disclosure Number: IPCOM000062736D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09

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Luhrs, GH Mendel, E [+details]


A process has been developed for manufacturing thin semiconductor wafers which are mechanically flat. The procedure results in flat polished Si wafers with a flatness maximum of 3 microns while eliminating residual saw marks.