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Interposed Segmented Chip Carrier

IP.com Disclosure Number: IPCOM000062849D
Original Publication Date: 1985-Jan-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Harvilchuck, JM Leiner, KL [+details]

Abstract

The segmented chip carrier device is interposed between integrated circuit chips and multilayered ceramic (MLC) substrate. The top and bottom of the carrier contain signal redistribution networks that reduce the number of required multilayered ceramic layers and provide more flexible engineering change activity by electron-beam patterning. Integrated circuit chips are bonded to the signal redistribution network (SRN) surface 2 of the segmented chip carrier device 3. The SRNs are electron-beam personalized. Since the personality can be changed at any time, conventional engineering change pad areas on the MLC substrate are not needed, thus conserving MLC real estate. Segmented chip carrier device 3 is now bonded to MLC substrate 4, on top of voltage redistribution network 5.