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Bipolar Integrated Circuit Process Incorporating Deep Trench Isolation

IP.com Disclosure Number: IPCOM000062854D
Original Publication Date: 1985-Jan-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Antipov, I Jambotkar, CG [+details]

Abstract

A bipolar process providing high-density integrated circuits is described in this article. This process includes polyimide-filled deep trenches for device isolation. Wherever substrate contacts are desired at the top surface of the integrated circuit chips, a means is included for a vertical P doped column providing access to the P substrate. During ion implantation of P channel stoppers beneath the isolation trenches, the Schottky barrier diode regions and emitter regions of NPN transistors are carefully protected in the described process. Further, the process ensures a continuous silicon nitride protection at the trench peripheries besides all non-contact regions at the top surface.