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Method for Decreasing the Capacitance of Diffusions Formed Under Recessed-Oxide Isolation Disclosure Number: IPCOM000062873D
Original Publication Date: 1985-Jan-01
Included in the Prior Art Database: 2005-Feb-18

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Abrahamovich, KM Bajuk, SP Griffin, LC Humphrey, BL Payne, EH Weed, DR [+details]


This article describes a process for providing a low capacitance self-aligned diffusion formed under a recessed-oxide (ROX) isolation area of a semiconductor substrate in which both the oxidation-defining nitride/ oxide layers are etched back coincidently from the diffused region to increase the self-aligned offset between the edges of the diffusion and ROX regions. In Fig. 1, sequential layers of silicon dioxide 10, silicon nitride 12 and silicon oxynitride [layer 14 may optionally be formed with silicon dioxide] 14 are formed on the surface of a silicon substrate 16. A photoresist layer 18 is applied and developed to define the extent of the desired diffusion region (not shown).