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Spurious Interrupt Trap and Identify Algorithm

IP.com Disclosure Number: IPCOM000062883D
Original Publication Date: 1985-Jan-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Agoglia, R Williams, D [+details]

Abstract

The Spurious Interrupt Trap and Identify Algorithm is a storage efficient mechanism which is used to trap unexpected interrupts and identify the correct level of the interrupt so that appropriate corrective action can be taken. Microprocessors, such as the Intel 8086, provide a rich interrupt structure which allows 256 unique interrupt levels. In most applications only a few of these interrupt levels are actually used and it is tempting to use the unassigned interrupt vectors as program space. The problem with this is that if a spurious interrupt occurs on an unassigned interrupt level, program execution will transfer to some unknown location where a catastrophic and unpredictable program error may occur.