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Modified Salicide-Single Gate Electrode for CMOS FET Applications

IP.com Disclosure Number: IPCOM000062888D
Original Publication Date: 1985-Jan-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Choi, KW Ishaq, MH Roberts, S [+details]

Abstract

Metals, such as Ti or Co, are used to form "salicide" gates, sources and drains of field-effect transistors (FET) for the purpose of yielding low resistance wiring with shallow junctions. A sequentially deposited chemical vapor deposition (CVD) WSi2 plus polysilicon process is patterned for a MOS gate. Titanium is subsequently deposited over the open gate electrode and source/drain junctions, and then diffused to form a salicide low resistance gate source and drain with gate electrode work function, applicable to P and N channel FETs for CMOS applications. It is first necessary to implant separate dopants within the polysilicon over N and P channel devices as part of the CMOS design. The use of a single work function gate for complementary N and P channel FETs is considered desirable, with values in the range of 4.5 to 4.