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Low Device Count Clocked Cmos "Exclusive or" Circuit

IP.com Disclosure Number: IPCOM000062910D
Original Publication Date: 1985-Jan-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Lee, HS Vogl, NG [+details]

Abstract

An arrangement of a minimal number of transistors is provided to achieve a two-input "Exclusive OR" (XOR) function which offers high performance using a gating signal (clock). When the clock is down (at ground), the output node 6 is precharged to high by p channel device 5. The change of inputs must occur during this precharge phase. Since the devices 1, 2 are off, the input skew does not discharge node 6. The access begins with the clock being pulsed high. Then, depending on the state of inputs, the output will either float at the high level or will be pulled down.