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Start-Stop Front End Scanner Disclosure Number: IPCOM000062995D
Original Publication Date: 1985-Jan-01
Included in the Prior Art Database: 2005-Feb-18

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Callens, P [+details]


This system provides a way of implementing a start-stop front end scanner of a multiline communication controller (i.e., 32 start-stop lines). It takes advantage of digital signal processing techniques and of a General-Purpose Signal Processor (GPSP) (now available at rates up to 10 MIPS) for minimizing the hardware necessary for each start-stop line. The figure shows the specific line hardware comprising a few latches. All the latches (i.e., 32 IN and 32 OUT) are sampled by a common clock which is independent of line speed. The frequency of this clock is an order of magnitude higher that the nominal bit rate of the highest line speed. - Each input clock pulse provides the GPSP with a 32-bit word W1 representing the input lines.