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Quasi-Planarization of Vertical Structures for Integration With Planar Devices

IP.com Disclosure Number: IPCOM000063033D
Original Publication Date: 1985-Feb-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Hung, MY Kuech, TF Tiwari, S [+details]

Abstract

Many devices perform better in a vertical configuration because of reduced surface-related effects. Such devices may need to be integrated with other devices which are superior as planar devices. Thus, a need arises to integrate the two on a planar structure. In addition, one may need to make contacts to intermediate layers in the vertical structure, e.g., a base region of a bipolar transistor. This invention outlines quasi-planarization that allows for top surface contacts to the underlying layers of vertically oriented devices. The procedure is illustrated using a Schottky photodiode as an example. In the fabrication procedure, etch a depression in the substrate, for example, of GaAs. In most applications, the walls will be gently sloped, as shown in Fig. 1. (The "S.I." stands for "semi-insulating".