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Process for Eliminating Intermetallics in Solder Operations

IP.com Disclosure Number: IPCOM000063040D
Original Publication Date: 1985-Feb-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Bakos, P Napp, DT [+details]

Abstract

A manufacturing process is described which enhances the ability to rework multiplanar cards or boards employed to mount integrated circuit components by eliminating the formation of intermetallics between the solder and the copper pads or conductors. A solder barrier selected from Ni, Co, V, W, Ta, and Mo is deposited on the copper . A barrier layer preferably of Ni or Co having a depth range of 10 to 35 micro inches is sufficient to prevent the formation of Cu Snx. Immersion plating is preferred to eliminate the depositing of some reducing salts which have a tendency to cause the thin film to crack, such as when electroless plating is used.