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Error Detector for Data Compressor Disclosure Number: IPCOM000063082D
Original Publication Date: 1985-Feb-01
Included in the Prior Art Database: 2005-Feb-18

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Benning, CS Moen, DN Schmierer, QG Tibbitts, SA [+details]


A hardware sequencer verifies that compressed data complies with specifications of a data compression algorithm. Data is compressed and stored in a buffer. The compressed data is verified to conform to the compression algorithm used to compress it while it is being transmitted to another storage location. The prior method of detecting errors in compressed data involved decompressing the data and comparing the data with the data which was compressed. Such a comparison would be very time consuming. Data from a storage device, such as a direct access storage device, of a computer is compressed and stored in a buffer 10 in the figure. The data is preferably compressed by use of a Systems Network Architecture compression algorithm which represents various runs of identical bytes of data by string control bytes (SCBs).