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Conditional Repeat of Micro-Orders - an Efficient Alternative to Conditional Micro-Branches Disclosure Number: IPCOM000063101D
Original Publication Date: 1985-Feb-01
Included in the Prior Art Database: 2005-Feb-18

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Olnowich, HT [+details]


The traditional concept for micro-code implementation involves pipelining the micro-control path into two stages: access and execute. However, VLSI (very large-scale integration) techniques, such as two-level micro-systems and multiple chip designs, are adding more stages to the micro-control path pipeline. These stages can be hidden for all normal micro-code execution but not for micro-branches. For the traditional approach, the micro-branch takes an extra stage to execute as compared to the other micro-orders. For each additional stage of delay added to the micro-control path pipeline, the micro-branch requires a corresponding extra stage to resolve.