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Timing Characterization Circuit

IP.com Disclosure Number: IPCOM000063129D
Original Publication Date: 1985-Feb-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
King, J Young, DC Zobniw, LM [+details]

Abstract

This article describes a test timing characterization circuit that, when inserted between the tester and the device under test (DUT), can update the DELAY and/or PULSE WIDTH timings on a per-device-tested basis. Tests that are used to tailor the pin timings to a DUT are called Timing Characterization Routines (TCRs). The TCRs apply only stimuli (no measures) because the tester "stops on first failure". The described concept requires that all TCRs be run prior to applying the functional test (which have both stimuli and responses). Each TCR sets up the tester for a desired time slice and the Timing Characterization Circuit (TCC) hardware accumulates the TCR results which adjust the timing prior to applying the functional test. After the TCRs are run, the TCC sets a delay deviation for the device under test.