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Three-Dimensional Semiconductor Chip Package

IP.com Disclosure Number: IPCOM000063140D
Original Publication Date: 1985-Feb-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Gruber, H Najmann, K Stadler, EE Stahl, R Straehle, W [+details]

Abstract

A three-dimensional semiconductor chip package is described which is suitable for low-cost mass production. First, semiconductor chips 1, stuck to a tape (not shown), are joined to a personalized single or multilayer plastic foil 2, providing connections between the chips and to the outside. Chips 1 are prefer ably joined to foil 2 by C4 bonding. Foil 2 may have an infinite length for joining during mass production. Subsequently, the chip/foil assembly is joined to a thermally conductive support 3 by gluing or soldering the backs of chips 1 to support 3. Support 3, preferably made of copper, has a low thermal resistance and is provided with punched grooves 4. Chips 1, stuck to the tape, foil 2, and support 3, may be separately wound on reels. After they have been assembled as described, they may again be wound on a reel.