Microprocessor-Based Speed Controller With Optimal Compensator
Original Publication Date: 1985-Feb-01
Included in the Prior Art Database: 2005-Feb-18
A variable-speed sampled data speed controller is disclosed. It is microprocessor-based and has minimal compensator pole-zero shifting. The controller operates by using several different loop compensators, each of which functions over a small speed range. The controller also has a minimal transient when switching from one compensator to the next. In a sampled data control system that is required to operate over a large speed range, an important parameter is the sample time, T. When rate feedback from a digital tachometer is used to generate the sample rate, the sample time changes as the speed changes, leading to poor control and potential instability. This is particularly true if the controller's speed range is very large.