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SECOND Data Path From Cache Data Buffers

IP.com Disclosure Number: IPCOM000063279D
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Pomerene, JH Puzak, TR Rechtschaffen, RN Sparacio, FJ [+details]

Abstract

Through use of cache data buffers and a second data path to the execution unit, the data bandwidth from the cache is increased. This allows increased performance of bandwidth-limited systems, and out of sequence executions with stores is also allowed. The figure shows the major units of a central processing unit 2 including general-purpose registers (GPRs) 3, and its associated cache 4. A push-down stack 6 of data from the cache is utilized as a second source of data. This SECOND data path from the cache 4 increases cache bandwidth. The push-down stack 6 has "N" entries composed of "X" entries for operands and "Y" entries for instructions (X + Y = N). Each "X" or "Y" category contains the last "X" or "Y" lines fetched within that category from the cache 4.