Word Redundancy Chip Terminal Test Circuit
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18
Many memory chips require word line redundancy. This requires shorting the redundant address pins, on the module, uniquely for each chip part number. In the module test area, when the chips are mounted, they are tested for continuity by using the module EC (engineering change) pads. Since the module wiring has already shorted some of the EC pads together, for part number personalization of the redundancy, it is impossible to test for terminal shorts or opens. This article describes a scheme requiring only the addition of a simple circuit and one output pad to the array chip as a means of ensuring terminal integrity through continuity testing of redundancy decoded signals at the module level. Fig.