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Instruction Break Pointing in a Microprocessor Development System

IP.com Disclosure Number: IPCOM000063334D
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Craft, DJ [+details]

Abstract

An improved method of implementing instruction breakpointing and instruction tracing facilities required in microprocessor development systems is described. Instruction breakpointing describes features of a development system which permit a user to specify in advance some locations in the address space of the microcode under test which, if referenced during execution of the microcode, may stop execution of the microcode and capture the status of the microcode for display to a user. The improved breakpointing scheme is shown in the figure. In operation, the target microprocessor 1 uses the same address lines 2 to address the control store 3 and a marker random-access memory (RAM) 4.