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Polysilicon Etch Protector

IP.com Disclosure Number: IPCOM000063352D
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Ning, TH [+details]

Abstract

This article relates generally to the fabrication of integrated circuits and more particularly to the controlled etching of the semiconductor material. Polysilicon, having greater etching selectivity than silicon dioxide during reactive ion etching, enables improved etching control when forming lightly doped drain structures in MOS (metal-oxide-semiconductor) material. Referring to Figs. 1a-1d, the usual steps are followed in forming field doped areas 1 which are covered by recessed field oxide zones 2 in silicon substrate 3. The substrate gate area between zones 2 has a gate oxide 4 grown thereon, and a gate polycide 5 with its oxide coating 6 are formed over oxide 4. Thereafter, in Fig 1b, a thin layer 7 of oxide is grown on gate polycide 5 and polysilicon 8 is deposited on the entire surface. In Fig.