Differential Driver for Lower Cascode
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18
In high performance integrated circuitry it is necessary to employ a minimum power supply spread (VCC - VEE) in order to optimize the circuit power-delay product. The lower the power supply spread, the more difficult it is to obtain sufficient logic swings (i.e., noise margins). The use of cascoding in current switch emitter follower (CSEF) circuitry aggravates the problem, because the devices of the lower cascode will be operated close to saturation. The disclosed circuit (Figs. 1A, 1B and 1C) drives the lower cascode devices differentially while providing sufficient tracking to insure adequate noise margins and avoid saturation over the anticipated range of temperature, power supply, and process variations. Fig. 2 illustrates a logic gate based on cascode-CSEF design. Fig. 1A illustrates the preferred circuit.