Browse Prior Art Database

Unclocked Cascode Voltage Switch Logic Circuit

IP.com Disclosure Number: IPCOM000063502D
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Miersch, EF Wagner, OM [+details]

Abstract

An N-channel cascode tree is capable of providing any logic function conceivable with n inputs A, A - Z, Z and 1 output O, O which are each true and complement. The output nodes O, O are connected to supply voltage +V through P-channel load devices 1, 2 which are cross-coupled. So far, existing cascode voltage switch (CVS) circuits, which are unclocked, have consumed DC power, as the bleeding devices are permanently on. The illustrated circuit avoids this disadvantage by replacing the bleeding transistors by P-channel devices 3a, 3b and 4a, 4b which are serially connected and controlled by any one pair (true and complement) of the input logic signals A, A .