Multiplexer for START/STOP ASCII and Synchronous SDLC
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18
A method and device are provided for efficiently multiplexing two different types of traffic (i.e., SDLC (Synchronous Data Link Control) or HDLC (High Level Data Link Control) and start-stop ASCII) on the same serial modem data link operating in synchronous mode. Assume ASCII start/stop is made to transmit a 7-bit code. An efficient multiplexing operation will be performed by dynamically allocating the common link to either one of the traffics, with priority being given to SDLC/HDLC. An 8 + 8 shift register is permanently triggered by the modem clock (not shown), as is the SDLC data adapter of the attached terminal. As soon as decoder 1 detects an activity on the SDLC input by recognizing a code FF (i.e., a flag 0111 1110 followed by an 8-bit pattern different from F, i.e.