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Static RAM Input Buffer and Its Transition Detector

IP.com Disclosure Number: IPCOM000063581D
Original Publication Date: 1985-Mar-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Mao, RS [+details]

Abstract

A static random-access memory (RAM) utilizes an open drain exclusive-OR circuit and a Schmitt trigger delay/filter latch to achieve fast input transition detection and better noise tolerance. Its input circuit is shown in Fig. 1. Devices 1 through 6 and devices 12 through 15 consist of a typical Schmitt trigger input buffer and differential output drivers. Assume that the input rises from logic 'O' (ground) to logic '1' level. It turns on devices 2 and 3 and pulls down node #1. Device 4 is used to control Schmitt trigger threshold voltage. Node #1 turns off device 6, and allows node #3 to rise. Node #1 and node #3 drive the differential amplifier (devices 12 through 15) and switches the true output (A) to logic '1' and complement output (A) to logic '0'. Assume that the input switches from logic '1' to logic '0'.