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Pipelining Data Storage Allocations

IP.com Disclosure Number: IPCOM000063680D
Original Publication Date: 1985-Apr-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Kukula, DA Robinson, HD [+details]

Abstract

In a data storage hierarchy, such as a random-access cache servicing a data storing disk file, the time delays caused by a write miss (no space allocated in cache for received data) is minimized by pipelining allocation of space in the cache with the transfer of data from a host processor. Allocation of cache data space can occur during data transfers from a connected host processor for enabling expected data to be received from the host processor to be immediately lodged in the cache resulting from a write cache hit. The host processor is connected to a backing data storage, such as a data storing disk file, main memory of a processor, and the like, via a data cache. Provisions are made for bypassing the cache.