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Initialization of Logic Chip Program Function Bits

IP.com Disclosure Number: IPCOM000063760D
Original Publication Date: 1985-Apr-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Thomforde, DJ [+details]

Abstract

Programming of multiple-usage chips to perform different functions is shown while requiring a minimum number of I/O pins and logic circuits. A logic chip is used four times in a level sensitive scan design (LSSD) scan ring configuration to perform four similar functions. Two function program bits in each chip are used to control the function on each of the 4 different chips. Since no I/O pins were available to provide bits to select the function performed by each chip, the bits are provided by using a single scan-only latch on each chip to provide one function program bit and the scan-only latch of the previous chip to provide the other bit. Four chips are indicated in the figure at 12, 14, 16 and 18.