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Read Amplifier With Integrated Output Latch for Bipolar Memory Cell Arrays

IP.com Disclosure Number: IPCOM000063766D
Original Publication Date: 1985-Apr-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Diebold, U Klein, W Wernicke, FC [+details]

Abstract

A frequent requirement for modern bipolar semiconductor memory chips is that the read data be storable in an output latch. The sense signal, supplied by the selected cell, is normally preamplified in a pre-sense amplifier and fed to a read amplifier. The output of the read amplifier controls the output latch and parallel thereto a data-out driver is controlled by decoupler means. As the output latch is positioned in the very output path, the additional load applied increases the access time without amplifying the sense signal. This disadvantage is eliminated by the circuit shown in the emboxed part of the drawing, in which the latch function is deactivated during reading. At that stage, however, the components, making up the latch, are used to amplify the read signal.