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Self-Aligned Silicide Base Contact by Evaporation of Silicon

IP.com Disclosure Number: IPCOM000063778D
Original Publication Date: 1985-Apr-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Arienzo, M Stork, JM [+details]

Abstract

This article relates generally to a method for fabricating bipolar semiconductor devices and more particularly to a method for forming a self-aligned silicide base contact by the evaporation of silicon. Still more particularly it relates to a method which provides a low resistance base contact and interconnect which enables accurate control of link-up. Fig. 1 shows a cross-sectional view of a bipolar transistor at an intermediate stage of fabrication. Standard bipolar technology is used to provide a bipolar isolated device region 1 in an n-epi layer 2 formed on an n+ subcollector layer 3. Thin layers 4,5 of SiO2 and Si3N4, respectively, are deposited and patterned to accurately define the emitter width, as shown in Fig. 1. Next, a boron implant is performed to define the extrinsic base and link-up 6.