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New Multilevel Scheme for Fast Carry-Skip Addition

IP.com Disclosure Number: IPCOM000063851D
Original Publication Date: 1985-Apr-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Barnes, ER Oklobdzija, VG [+details]

Abstract

A method is described which provides a way to achieve a fast addition of two binary numbers by using a multilevel carry-skip scheme optimally divided to attain speed comparable to carry-lookahead yet much simpler to implement and convenient for VLSI implementation. This multilevel carry-skip addition scheme, with the optimized division into the carry-skip groups, achieves speed comparable to the carry-lookahead scheme. Yet, this scheme is much simpler than carry-lookahead to implement and is uniform in fan-in and fan-out requirements. Therefore, it is very convenient for VLSI implementations, and we claim that it makes much more sense for VLSI than carry-lookahead scheme. In certain fast carry-skip adders, the speed is achieved by dividing the carry chain into groups of bits over which carry signals could skip.