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Shared Instruction And/Or Data Caches in a Multiprocessing System

IP.com Disclosure Number: IPCOM000063880D
Original Publication Date: 1985-May-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Fletcher, RP Martin, DB [+details]

Abstract

This article describes a multiprocessing system (MP) having a shared cache which contains only instructions (I) or operand data (D). Fig. 1 illustrates a MP containing a shared I cache, each processor having a private (i.e., non-shared) D cache. Fig. 2 illustrates an MP in which each processor has private D and I caches, and the plural processors also have a shared data (SD) cache receiving only shared and changed data. In both Figs. 1 and 2, each private and shared cache has its own cache directory. The data or instructions in any private or shared cache are handled as a group of bytes called a line, which is a unit of data identified by a valid entry in any cache directory.