Low Power Tri-State Push-Pull Driver With Transient Power Pulldown
Original Publication Date: 1985-May-01
Included in the Prior Art Database: 2005-Feb-18
This article concerns a scheme for lowering the DC power dissipation of a typical VTL driver circuit by confining much of the power loss to the transition periods of operation. The circuitry is enabled only during transients, when it is powered up, otherwise operating at a lower power level while in DC. The disclosed driver circuit is shown in Fig. 1. It consists of a phase splitter push-pull inverter arrangement, with transistor T3 driving the T8-T9 Darlington pair for pullup, and T11 for pulldown . A TTL (transistor-transistor logic) input signal is provided through T2, R6 and R7. Feedback capacitor CFB is used to control the slope of the falling transition. The transient power pulldown feature is achieved by sensing the input signal with T4 and the output signal with the R11-R12 voltage divider.