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Sensing Scheme for Semi-Random Memory Array

IP.com Disclosure Number: IPCOM000064023D
Original Publication Date: 1985-May-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Kemerer, DW [+details]

Abstract

This array has storage cells gated onto bit lines by word lines, with the cells organized as deep stacks which function as LIFO (last-in, first-out) storage elements. During a conventional write cycle, all word lines are held high over a single block of cells. The data to be written into the deepest cell in each stack is placed into the bit lines, and after settling, the word line N, gating the deepest cells of the array to the next deepest cells, is brought low. This cycle is repeated all the way up the stack to word line 10 until the topmost cells have been filled with data. To read the stack out, the conventional method of reversing the write cycle, sensing one bit during what had been each write interval by turning and keeping on the word lines one at a time, starting with the first word line 10.