Browse Prior Art Database

Channel Interface Analyzer

IP.com Disclosure Number: IPCOM000064101D
Original Publication Date: 1985-Jun-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Ferrick, M Taborek, R [+details]

Abstract

This Channel Interface Analyzer allows problem determination on complex large system I/O related problems involving channels, control units and devices. It provides improved timing accuracy and the ability to trace up to four channels and 32 alternate lines simultaneously and in accurate isolation of faults. The block diagram of the analyzer is shown in the figure. Tracing is event-driven on rise and fall of all inputs. All signals are accurately time-stamped between events, thereby providing a logic analyzer-type trace format for extended trace multiple level (e.g., low level = single input transition, high level = multiple input transition). Multiple function (e.g., AND/OR) trigger allows capture of virtually all channel interface sequences.