Write Precompensation Method Using Special D-Flip-Flops
Original Publication Date: 1985-Jun-01
Included in the Prior Art Database: 2005-Feb-18
The method of precompensation described herein uses combinatorial logic decodes 12 of the same shift register used in a typical serializer-deserializer of the write data circuit plus three history bits. The circuitry shown in Fig. 1 can be shared with the write encoding function to provide the necessary history information to produce MFM/FM serial write data. Normally, "data" and "clock" pulses are written serially on a disk at specific times with respect to some reference oscillator. Adjacent ones (magnetic transitions) written in this way tend to shift apart on the media itself. This magnetic shift can be minimized by physically writing data and clock signals early and late with respect to their specified normal oscillator times.