Fast Restore of Bit Lines in MTL Arrays
Original Publication Date: 1985-Jun-01
Included in the Prior Art Database: 2005-Feb-18
Proposed is a fast restore current path of the type described in [*], which affords a faster restore operation at a reduced number of circuit components for implementation. Prior to each read or write cycle of bipolar chips utilizing merged transistor logic (MTL) storage cells, the capacitances of the unselected bit lines have to be discharged. After completion of a read or write cycle, the potential of all bit lines (selected or unselected) has to be restored to the standby potential before a new cycle. The above-mentioned prior-art restore control of the bit lines necessitates a relatively large number of components and a relatively large chip area. The appertaining restore current path is shown in Fig. 1A.