Browse Prior Art Database

Processor Active Check Scheme

IP.com Disclosure Number: IPCOM000064246D
Original Publication Date: 1985-Jun-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Holdaway, DO Ide, RA Layden, EC Schnakenberg, LG [+details]

Abstract

In computer systems having a plurality of microprocessors it is desirable to enable each microprocessor to check the operation of the other microprocessors and, in the case of a malfunction, assume at least a limited number of operating responsibilities of the malfunctioning microprocessor so as to avoid catastrophic failure of the system. The processor active check scheme provides a continuous check for proper operation of the microprocessors in a dual microprocessor configuration. The test scheme verifies that the microprocessors are functioning and are processing instructions in a proper fashion. If either processor is found to be stalled or not functioning properly, the absence of a correct response is detected, appropriate termination of the operation in progress is performed, and a fault indication is presented. Fig.