Technique for Logical Terminal Address Allocation on a Controller
Original Publication Date: 1985-Jul-01
Included in the Prior Art Database: 2005-Feb-18
The described scheme relates to an address packing algorithm for use in a controller in combination with multiple logical terminals. In accordance with the scheme, controller ports which are to support multiple logical terminals are grouped together in an ordered fashion. In the example given, the ports having multiple logical terminals are assigned in an order commencing with an arbitrarily chosen single port and then in ascending order according to the number of logical terminals assigned. To reduce the amount of definition required from an operator, an algorithm is used to assign addresses based on some variables.