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Multiplexed Sense Amplifier With Temporary Store for Noise Avoidance

IP.com Disclosure Number: IPCOM000064407D
Original Publication Date: 1985-Jul-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Nickel, DJ [+details]

Abstract

This circuit stores the first bit in a temporary memory, restores the sense amplifier and the latched bit lines, and then reads the bit line that was left floating. It avoids the high noise level associated with reading at the time when multiplexed sense amplifiers are first latched down, as is usually done. The circuit is shown in Fig. 1. As can be seen in the timing diagram (Fig. 2), reading the bit line that was left floating occurs after having stored the first bit in memory, and restoring the sense amplifier and latched bit lines. This bit line is then restored to the level dictated by the original data and then isolated. The sense amplifier is restored again and the temporary bit latched into the amplifier.