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Shift Register Control for Stepper Motors

IP.com Disclosure Number: IPCOM000064411D
Original Publication Date: 1985-Jul-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Brewer, JA Davis, JF Stickels, DR [+details]

Abstract

A technique is described whereby a stepper motor controller utilizes an n-bit shift register that can be parallel loaded with a pulse sequence. The pulse sequence provides the required control of serial pulse actuated motors and drive mechanisms, so as to reduce the total input/output (I/O) processing overhead requirements. In prior art, stepper motors and direct current servo motors are frequently provided with control interfaces, whereby a single digital pulse causes a discrete angular movement of the motor shaft. Similarly, a stream of pulses results in continuous movement of the shaft where the angular velocity is proportional to the pulse frequency. In many stepper motor applications requiring thousands of pulses per second, the I/O requirements can be significant.