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Improved Testing and On-Line Checking of Complementary Differential Combinational Logic

IP.com Disclosure Number: IPCOM000064455D
Original Publication Date: 1985-Jul-01
Included in the Prior Art Database: 2005-Feb-18

Publishing Venue

IBM

Related People

Authors:
Blum, A [+details]

Abstract

This complementary differential combinational logic (CDCL) supplies a binary data output signal on two complementary output lines (two-line or two-rail coded data). This permits on-line checking, as the complementary nature of the signals on the two lines can be checked, for instance, by an XOR gate. However, if the binary signal is applied to a latch, this possibility of checking is lost, because the latch will always assume one of its two possible states and will therefore always supply complementary output signals at its true and complementary outputs, respectively. To retain the checking advantages of two-line coded data, this method proposes that a latch be used for each of the two lines. Fig.