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Multi-Protocol Scanner Interface Disclosure Number: IPCOM000064552D
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19

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Stokes, OL [+details]


This article describes an arrangement wherein a microprocessor operating in a particular protocol with a controller is enabled to operate in another protocol with another controller when the first controller is not available. When the microprocessor (Fig. 1) is placed in an operating position, a series of pulses -XMIT MARK and -XMIT SPACE of a particular protocol are transmitted from the Communications Adapter (CA) to a controller (not shown). The controller will also indicate its readiness to receive data by sending pulses -RCV MARK and -RCV SPACE which are received by CA and passed on to the processor to indicate that the controller is ready to receive transmission of data.