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Glitchless Encoder Interface

IP.com Disclosure Number: IPCOM000064597D
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19

Publishing Venue

IBM

Related People

Authors:
Stanley, RC Stermer, TW [+details]

Abstract

A technique is described whereby a circuit, interfaced with a traditional incremental encoder, performs up and down pulse sequencing, so that when fed to a standard up and down counter, it will provide stable counts. Previously, glitches caused by vibration and spurious noise signals produced extra or missing counts which caused unacceptable output errors. The circuit, as shown in the figure, receives inputs 10 and 11 from photocells or similar devices, and is fed to latch units 12 to 15. Latch 12 or 13 is set whenever input 10 changes in either direction. This causes one-shot circuit 16 to clear latches 14 and 15 through line 17 and will also set direction check latch 18, if input 11 is positive at that time. Any further changes to input 10 will have no effect until a change is made in input 11.