Specification of Device Isolation Requirements by Operation
Original Publication Date: 1985-Aug-01
Included in the Prior Art Database: 2005-Feb-19
The testing of arrays, other macros, or functional units embedded in a circuit is facilitated by the simultaneous sensitizing of paths between pins on the circuit boundary and pins on the macro boundary. Path sensitization is achieved by assigning some circuit inputs to specific logic values; e.g., in Fig. 1, if B=0, C=1 and F=1, then sensitized paths exist simultaneously between the following pairs of corresponding points: A - V, D - W, E - X, G - Y, and H - Z such that any value on A, D, E, Y, Z is directly observable on V, W, X, G, H. The values for B, C, and F are called preconditioning values. It is not always possible to simultaneously establish all sensitized paths; e.g., preconditioning for one path may conflict with preconditioning for another path. This conflict is alleviated in the following.